The present invention relates to integrated circuit layouts, and in particular to automatic placement of space-filling interconnect structures in those layouts.
In integrated circuit designs, special structures called “contact cuts” may for example establish the electrical connection between at least two layers. These are holes cut vertically through various layers; a connective metal will then be placed into the holes during integrated circuit fabrication to complete the interconnection. The contact cut distribution is laid out depending upon the relevant layers' common cross-sectional overlaps (which are typically rectangular or polygonal). Layout designers must pay particular attention and put additional effort into ensuring the proper number and distribution of contact cuts to meet multiple electrical, design for manufacturability, and yield requirements.
For example, contact cuts must be organized such that the resulting current flow is distributed as evenly as possible, while also considering Ohmic losses and electromigration-related effects. The common cross-sectional overlap areas are therefore generally to be filled with contact cuts to the extent possible, considering applicable design rules governing lithographic requirements. Design rules typically specify limits on designed feature sizes, spacing requirements between features, and the extent to which a feature must be surrounded by a particular layer of material. FIG. 1 depicts a few exemplary layout features and their related design rules.
Further, as device dimensions continue to shrink, there is an increasing emphasis on regular structures with collinear edges. For example, an advantage of having regular structures with symmetric and collinear or aligned contact cuts close to each other is that various parasitic effects (such as fringe or sidewall capacitance, etc.) are uniformly distributed or matched. This is a critical requirement for some analog circuits, which may be configured into a common centroid arrangement for example. Symmetric and aligned placement of contact cuts across parallel edges or segments of a guard ring also helps in ensuring matching parasitics.
Filling up a given cross-section with perfectly aligned, symmetric, and well distributed contact cuts not only supports regular structure use (thus improving yield), but also allows a maximum number of contact cuts (thus addressing Ohmic and electromigration concerns). Further, for designs having a guard ring on a block boundary, such design practices help simplify manipulation of block instances when sharing the edges, stacking, or tiling. These issues are reflected in numerous new design rules in current design flows.
Existing automated design tool solutions for contact cut distribution have shortcomings leading to less than optimal results. Referring now to FIG. 2, an exemplary polygonal area 200 to be filled with contact cuts 202 is shown. A variety of problems with existing solutions are depicted in several subsequent figures. For example, FIG. 3 depicts a fairly good contact cut distribution within polygon 300 that nonetheless includes uneven spacings 302 between contact cuts leading to asymmetries, and gaps 304 between contact cuts and polygon boundaries, which result in non-collinear contact cuts such as those marked 306 and 308 for example. FIG. 4 depicts another contact cut distribution within polygon 400 with relatively uniform spacing but with more severe problems. In this case, major portions of contact cut rows and/or columns may be omitted in some circumstances, leading to asymmetric areas that are relatively empty of contact cuts 402.
Further, as shown in FIG. 5, contact cuts 502 may be misaligned and irregular in the presence of bends and corners in object 500 for example. Such contact cut distributions may occur across multiple edges or segments of rectangular or non-rectangular areas in guard rings or other structures in integrated circuit layouts.
Additionally, as shown in FIGS. 6A and 6B, when separate contacting target layout areas are merged, a less than maximum number of contact cuts may result. FIG. 6A depicts two polygonal areas (600 and 602) with relatively good contact cut distributions prior to a merge operation. FIG. 6B depicts the merged polygonal area after the merge operation performed by known products, which has resulted in roughly half of the contact cuts 700 being lost.
In another similar case of merging two fluid guard ring instances, FIG. 7A depicts the merged polygonal area created by a known design tool, resulting in an inconsistent and irregular distribution of contact cuts, with different contact cut rows in different segments of the same width. FIG. 7B depicts a more ideal merger result as created by an embodiment of the present invention, to be described. In a further example, FIG. 7C depicts two other polygonal areas to be merged. The output of an embodiment of the present invention, to be described, is shown in FIG. 7D with evident symmetrical placement of contact cuts across parallel segments.
Layout designers must therefore devise different schemes to fill a target layout area with a maximum possible number of perfectly aligned and symmetric contact cuts in spite of these shortcomings. This involves significant manual editing and thus loss of design productivity. An improved tool for automated contact cut placement in integrated circuit layouts is therefore needed.